For RK3399's GRF module, if we want to operate the graphic related grf registers, we need to enable the pclk_vio_grf which supply power for VIO GRF IOs, so it's better to introduce an optional grf clock in driver.
Signed-off-by: Yakir Yang <y...@rock-chips.com> --- Hi all, This is an external patch for analogix_dp misc cleanup thread [0] [0]: https://patchwork.kernel.org/patch/9175613/ BR, - Yakir drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 787dc51..6a83f1a 100644 --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c @@ -56,6 +56,7 @@ struct rockchip_dp_device { struct drm_display_mode mode; struct clk *pclk; + struct clk *grfclk; struct regmap *grf; struct reset_control *rst; @@ -151,11 +152,20 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder) dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG"); + if (dp->grfclk) { + ret = clk_prepare_enable(dp->grfclk); + if (ret < 0) { + dev_err(dp->dev, "failed to enable grfclk %d\n", ret); + return; + } + } + ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val); - if (ret != 0) { + if (ret != 0) dev_err(dp->dev, "Could not write to GRF: %d\n", ret); - return; - } + + if (dp->grfclk) + clk_disable_unprepare(dp->grfclk); } static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder) @@ -235,6 +245,10 @@ static int rockchip_dp_init(struct rockchip_dp_device *dp) return PTR_ERR(dp->grf); } + dp->grfclk = devm_clk_get(dev, "grf"); + if (IS_ERR(dp->grfclk)) + dp->grfclk = NULL; + dp->pclk = devm_clk_get(dev, "pclk"); if (IS_ERR(dp->pclk)) { dev_err(dev, "failed to get pclk property\n"); -- 1.9.1
