From: Tero Kristo <[email protected]> The reset value for this register seems broken on certain versions of tps65218 chip, so make sure the dcdc3 settings is proper. Needed for proper functionality of rtc+ddr / rtc-only modes.
Signed-off-by: Tero Kristo <[email protected]> Signed-off-by: Dave Gerlach <[email protected]> Signed-off-by: Keerthy <[email protected]> --- drivers/regulator/tps65218-regulator.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/tps65218-regulator.c b/drivers/regulator/tps65218-regulator.c index 8eca1eb..d1e631d 100644 --- a/drivers/regulator/tps65218-regulator.c +++ b/drivers/regulator/tps65218-regulator.c @@ -180,8 +180,12 @@ static int tps65218_pmic_set_suspend_disable(struct regulator_dev *dev) if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) return -EINVAL; - if (!tps->info[rid]->strobe) - return -EINVAL; + if (!tps->info[rid]->strobe) { + if (rid == TPS65218_DCDC_3) + tps->info[rid]->strobe = 3; + else + return -EINVAL; + } return tps65218_set_bits(tps, dev->desc->bypass_reg, dev->desc->bypass_mask, -- 1.9.1
