On Tue, Jun 28, 2016 at 3:23 AM, Maxime Ripard <maxime.rip...@free-electrons.com> wrote: > On Wed, Jun 22, 2016 at 06:11:55PM +0800, Chen-Yu Tsai wrote: >> On Wed, Jun 22, 2016 at 6:02 PM, Maxime Ripard >> <maxime.rip...@free-electrons.com> wrote: >> > Hi, >> > >> > On Mon, Jun 20, 2016 at 10:52:15AM +0800, Chen-Yu Tsai wrote: >> >> + /* >> >> + * The ADDA 4 MHz clock is from the codec side of the AC100, >> >> + * which is likely a different power domain. However, boards >> >> + * always have both sides powered on, so it is impossible to >> >> + * test this. >> >> + */ >> > >> > If that ADDA clock is exposed by the codec, why are you putting it in >> > the RTC? >> >> The thing is it's not entirely clear that it's from the codec side. >> I'm just inferring this from the name. (I'll make the comment clearer.) >> The codec parts of the datasheet don't mention this clock at all. >> >> Allwinner's SDK puts all the clocks under the RTC module. And the >> are always on, so I can't really turn off the codec and see what >> happens. That and I don't have an oscilloscope or logic analyzer. > > Why not just create a separate clock driver then?
That would mean a separate device node as well. I'd like to keep the bindings close to how the hardware is organized. I can move the ADDA clock over to the codec side. ChenYu
