From: Dave Hansen <dave.han...@linux.intel.com>

Len Brown noticed something was amiss in our INTEL_FAM6_*
definitions.  It seems like model 0x1F was a Nehalem part,
marketed as "Intel Core i7 and i5 Processors" (according to the
SDM).  But, although it was a Nehalem 0x1F had some uncore events
which were shared with Westmere.

Len also mentioned he thought it was called "Havendale", which
Wikipedia says was graphics-oriented and canceled:

        https://en.wikipedia.org/wiki/Nehalem_(microarchitecture)

So either way, it's probably not imporant what we call it, but
call it Nehalem to be accurate, and add a "G" since it seems
graphics-related.  If it were canceled that would be a good reason
why it's so sparsely and inconsistently referred to in the code.

Cc: Len Brown <l...@kernel.org>
Signed-off-by: Dave Hansen <dave.han...@linux.intel.com>
---

 b/arch/x86/events/msr.c               |    2 +-
 b/arch/x86/include/asm/intel-family.h |    2 +-
 b/drivers/idle/intel_idle.c           |    2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff -puN arch/x86/include/asm/intel-family.h~rename-westmere 
arch/x86/include/asm/intel-family.h
--- a/arch/x86/include/asm/intel-family.h~rename-westmere       2016-06-29 
12:25:30.919935676 -0700
+++ b/arch/x86/include/asm/intel-family.h       2016-06-29 12:25:30.925935948 
-0700
@@ -18,10 +18,10 @@
 #define INTEL_FAM6_CORE2_DUNNINGTON    0x1D
 
 #define INTEL_FAM6_NEHALEM             0x1E
+#define INTEL_FAM6_NEHALEM_G           0x1F /* Auburndale / Havendale */
 #define INTEL_FAM6_NEHALEM_EP          0x1A
 #define INTEL_FAM6_NEHALEM_EX          0x2E
 #define INTEL_FAM6_WESTMERE            0x25
-#define INTEL_FAM6_WESTMERE2           0x1F
 #define INTEL_FAM6_WESTMERE_EP         0x2C
 #define INTEL_FAM6_WESTMERE_EX         0x2F
 
diff -puN arch/x86/events/msr.c~rename-westmere arch/x86/events/msr.c
--- a/arch/x86/events/msr.c~rename-westmere     2016-06-29 12:25:30.920935721 
-0700
+++ b/arch/x86/events/msr.c     2016-06-29 12:25:30.926935993 -0700
@@ -36,11 +36,11 @@ static bool test_intel(int idx)
 
        switch (boot_cpu_data.x86_model) {
        case INTEL_FAM6_NEHALEM:
+       case INTEL_FAM6_NEHALEM_G:
        case INTEL_FAM6_NEHALEM_EP:
        case INTEL_FAM6_NEHALEM_EX:
 
        case INTEL_FAM6_WESTMERE:
-       case INTEL_FAM6_WESTMERE2:
        case INTEL_FAM6_WESTMERE_EP:
        case INTEL_FAM6_WESTMERE_EX:
 
diff -puN drivers/idle/intel_idle.c~rename-westmere drivers/idle/intel_idle.c
--- a/drivers/idle/intel_idle.c~rename-westmere 2016-06-29 12:25:30.922935812 
-0700
+++ b/drivers/idle/intel_idle.c 2016-06-29 12:25:30.927936038 -0700
@@ -1023,7 +1023,7 @@ static const struct idle_cpu idle_cpu_bx
 static const struct x86_cpu_id intel_idle_ids[] __initconst = {
        ICPU(INTEL_FAM6_NEHALEM_EP,             idle_cpu_nehalem),
        ICPU(INTEL_FAM6_NEHALEM,                idle_cpu_nehalem),
-       ICPU(INTEL_FAM6_WESTMERE2,              idle_cpu_nehalem),
+       ICPU(INTEL_FAM6_NEHALEM_G,              idle_cpu_nehalem),
        ICPU(INTEL_FAM6_WESTMERE,               idle_cpu_nehalem),
        ICPU(INTEL_FAM6_WESTMERE_EP,            idle_cpu_nehalem),
        ICPU(INTEL_FAM6_NEHALEM_EX,             idle_cpu_nehalem),
_

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