On Mon, Jul 04, 2016 at 01:46:21AM +0900, Yoshinori Sato wrote:
> sh used P1 address space in early device tree.
> So need convert P1 to physical address before reserve memory.
>
> Signed-off-by: Yoshinori Sato <ys...@users.sourceforge.jp>
> ---
> arch/sh/boards/of-generic.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> index 57d45dc..8dbf978 100644
> --- a/arch/sh/boards/of-generic.c
> +++ b/arch/sh/boards/of-generic.c
> @@ -15,6 +15,7 @@
> #include <linux/clocksource.h>
> #include <linux/irqchip.h>
> #include <linux/clk-provider.h>
> +#include <linux/memblock.h>
> #include <asm/machvec.h>
> #include <asm/rtc.h>
>
> @@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
> return 0;
> }
> arch_initcall_sync(sh_of_device_init);
> +
> +int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
> + phys_addr_t size, bool nomap)
> +{
> + if (nomap)
> + return memblock_remove(base, size);
> +
> + if (base >= P1SEG)
> + base &= ~P1SEG;
> + return memblock_reserve(base, size);
> +}
> --
I think we need a consistent form of physical memory addressing in the
DT that doesn't require this. Hard-coding details of the segmented
memory model all over the place does not look like a good idea; it's
going to badly break anything with full 32-bit which I believe some
SH-4 models had (those with PMB?) and which J3/J4 will almost
certainly have.
Rich
