On Mon, 18 Jul 2016 18:10:37 +0200 "H. Nikolaus Schaller" <h...@goldelico.com> wrote:
> commit <e93762bbf681> ("w1: masters: omap_hdq: add support for 1-wire mode") > did add a statement to clear the hdq_irqstatus flags in hdq_read_byte(). > > If the hdq reading process is scheduled slowly or interrupts are disabled > for a while the hardware read activity might already be finished on entry > of hdq_read_byte(). And hdq_isr() already has set the hdq_irqstatus to > 0x6 (can be seen in debug mode) denoting that both, the TXCOMPLETE > and RXCOMPLETE interrupts occurred in parallel. > > This means there is no need to wait and the hdq_read_byte() can just read > the byte from the hdq controller. > > By resetting hdq_irqstatus to 0 the read process is forced to be always > waiting again (because the if statement always succeeds) but the hardware > will not issue another RXCOMPLETE interrupt. This results in a false > timeout. > > After such a situation the hdq bus hangs. > > Signed-off-by: H. Nikolaus Schaller <h...@goldelico.com> Needs a cc:stable. I'll assume Greg will be handling this patch.