On Tue, 12 Jul 2016 12:16:19 +0100 Colin King <colin.k...@canonical.com> wrote:
> From: Colin Ian King <colin.k...@canonical.com> > > According to the HPT366 data sheet, PCI config space dword 0x40-0x43 > bits 11:8 specify the primary drive cmd_high_time, however, > currently just 3 bits of the 4 are being used because the mask > is 0x700 and not 0x0f00. Fix the mask, allowing for the 40MHz clock > to be detected. Is this tested on real hardware ? I learned long ago never to blindly trust IDE data sheets. It looks right but if anyone actually has a 40MHz PCI bus box with an HPT366 it would be good to test. Alan
