Hi Rob, On 20/07/16 13:56, Rob Herring wrote: > On Tue, Jul 19, 2016 at 01:40:41PM +0100, Juri Lelli wrote: > > ARM systems may be configured to have cpus with different power/performance > > characteristics within the same chip. In this case, additional information > > has to be made available to the kernel (the scheduler in particular) for it > > to be aware of such differences and take decisions accordingly. > > > > Therefore, this patch aims at standardizing cpu capacities device tree > > bindings for ARM platforms. Bindings define cpu capacity-dmips-mhz > > parameter, to allow operating systems to retrieve such information from > > the device tree and initialize related kernel structures, paving the way > > for common code in the kernel to deal with heterogeneity. > > > > Cc: Rob Herring <[email protected]> > > Cc: Pawel Moll <[email protected]> > > Cc: Mark Rutland <[email protected]> > > Cc: Ian Campbell <[email protected]> > > Cc: Kumar Gala <[email protected]> > > Cc: Maxime Ripard <[email protected]> > > Cc: Olof Johansson <[email protected]> > > Cc: Gregory CLEMENT <[email protected]> > > Cc: Paul Walmsley <[email protected]> > > Cc: Linus Walleij <[email protected]> > > Cc: Chen-Yu Tsai <[email protected]> > > Cc: Thomas Petazzoni <[email protected]> > > Cc: [email protected] > > Signed-off-by: Juri Lelli <[email protected]> > > --- > > > > Changes from v1: > > - removed section regarding capacity-scale > > - added information regarding normalization > > > > Changes from v4: > > - binding changed to capacity-dmips-mhz > > - sections and changelod updated accordingly > > > > Changes from v5: > > - addressed Mark and Vincent comments > > --- > > .../devicetree/bindings/arm/cpu-capacity.txt | 236 > > +++++++++++++++++++++ > > Documentation/devicetree/bindings/arm/cpus.txt | 10 + > > 2 files changed, 246 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/arm/cpu-capacity.txt > > I guess I'm okay with the scaled values, so: > > Acked-by: Rob Herring <[email protected]> >
Thanks! > [...] > > > +Example 2 (ARM 32-bit, 4-cpu system, two clusters, > > + cpus 0,1@1GHz, cpus 2,3@500MHz): > > +capacities-dmips-mhz are scaled w.r.t. 2 (cpu@0 and cpu@1), this means > > that first > > +cpu@0 and cpu@1 are twice fast than cpu@2 and cpu@3 (at the same frequency) > > This example is a bit confusing with both the capacity and frequency > being half. I also find it a bit unrealistic to have a 2x performance > difference on the same micro arch. But it is all just an example... > Right, it's a fake example just to highlight how the values are used. Best, - Juri
