On Tue, Aug 30, 2016 at 11:53:33AM -0700, Luck, Tony wrote:
> Each Xeon includes a number of capability registers in PCI space
> that describe some features not enumerated by CPUID.
>
> Use these to determine that we are running on a model that can recover
> from machine checks. Hooks for Ivybridge ... Skylake provided.
>
> Signed-off-by: Tony Luck <tony.l...@intel.com>
> ---
...
> diff --git a/arch/x86/kernel/cpu/mcheck/mce.c
> b/arch/x86/kernel/cpu/mcheck/mce.c
> index 79d8ec849468..c192fabc3d76 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> @@ -41,6 +41,7 @@
> #include <linux/debugfs.h>
> #include <linux/irq_work.h>
> #include <linux/export.h>
> +#include <linux/jump_label.h>
>
> #include <asm/processor.h>
> #include <asm/traps.h>
> @@ -2676,8 +2677,14 @@ static int __init mcheck_debugfs_init(void)
> static int __init mcheck_debugfs_init(void) { return -EINVAL; }
> #endif
>
> +DEFINE_STATIC_KEY_FALSE(mcsafe_key);
> +EXPORT_SYMBOL_GPL(mcsafe_key);
> +
> static int __init mcheck_late_init(void)
> {
> + if (mca_cfg.recovery)
What are we doing with the recovery bool? You want to keep the cmdline
switch: mce=recovery?
Btw, it needs documenting over mcheck_enable().
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
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