Am Dienstag, 6. September 2016, 02:17:14 CEST schrieb Caesar Wang: > Add the interrupts cells value for 4, and the 4th cell is zero. > > Due to the doc[0] said:" the system requires describing PPI affinity, > then the value must be at least 4" > The 4th cell is a phandle to a node describing a set of CPUs this > interrupt is affine to. The interrupt must be a PPI, and the node > pointed must be a subnode of the "ppi-partitions" subnode. For > interrupt types other than PPI or PPIs that are not partitionned, > this cell must be zero. See the "ppi-partitions" node description > below. > > [0]: > Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt > > Signed-off-by: Caesar Wang <[email protected]> > Acked-by: Mark Rutland <[email protected]> > Cc: Heiko Stuebner <[email protected]> > Cc: Will Deacon <[email protected]> > Cc: Marc Zyngier <[email protected]> > CC: [email protected]
applied to my dts64 branch for 4.9 Thanks Heiko
