----- Original Message ----- > From: "David Matlack" <dmatl...@google.com> > To: "Paolo Bonzini" <pbonz...@redhat.com> > Cc: "kvm list" <k...@vger.kernel.org>, linux-kernel@vger.kernel.org, "Jim > Mattson" <jmatt...@google.com>, "Radim > Krčmář" <rkrc...@redhat.com> > Sent: Wednesday, November 30, 2016 7:05:04 PM > Subject: Re: [PATCH v3 1/5] KVM: nVMX: generate non-true VMX MSRs based on > true versions > > On Wed, Nov 30, 2016 at 3:16 AM, Paolo Bonzini <pbonz...@redhat.com> wrote: > > On 30/11/2016 03:14, David Matlack wrote: > >> > >> /* secondary cpu-based controls */ > >> @@ -2868,36 +2865,32 @@ static int vmx_get_vmx_msr(struct kvm_vcpu *vcpu, > >> u32 msr_index, u64 *pdata) > >> *pdata = vmx_control_msr( > >> vmx->nested.nested_vmx_pinbased_ctls_low, > >> vmx->nested.nested_vmx_pinbased_ctls_high); > >> + if (msr_index == MSR_IA32_VMX_PINBASED_CTLS) > >> + *pdata |= PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR; > > > > Almost: PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR must be > > added to both the low and high parts. Likewise below. > > I guess you can use vmx_control_msr to generate it, too. > > SGTM. > > Although that would mean the true MSRs indicate a bit must-be-0 while > the non-true MSRs are indicating it must-be-1, which seems odd.
You're right. the high part is "can be 1", so the true MSR's high part must already include the always-on-without-true-MSR bits. Good! Paolo
