Add description of NAND flash on Sierra Wireless WP8548 module
(and MangOH board).

Cc: Andy Gross <andy.gr...@linaro.org>
Cc: David Brown <david.br...@linaro.org>
Cc: Rob Herring <robh...@kernel.org>
Cc: Mark Rutland <mark.rutl...@arm.com>
Cc: Russell King <li...@armlinux.org.uk>
Cc: linux-arm-...@vger.kernel.org
Cc: linux-...@vger.kernel.org
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Signed-off-by: Zoran Markovic <zmarko...@sierrawireless.com>
---
 arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi |   50 ++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi 
b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
index 7869898..a4d1158 100644
--- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
+++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
@@ -54,6 +54,56 @@
        };
 };
 
+&nand0 {
+       nandcs@0 {
+               compatible = "qcom,nandcs";
+               reg = <0>;
+
+               linux,mtd-name = "micron,mt29f4g08";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               nand-ecc-strength = <4>;
+               nand-ecc-step-size = <512>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       bootloader@0x051c0000 {
+                               reg = <0x51c0000 0x100000>;
+                               read-only;
+                       };
+
+                       kernel@0x052c0000 {
+                               reg = <0x52c0000 0x1400000>;
+                               read-only;
+                       };
+
+                       rootfs@0x066c0000 {
+                               reg = <0x66c0000 0x3140000>;
+                               read-only;
+                       };
+
+                       user0@0x09800000 {
+                               reg = <0x9800000 0x2780000>;
+                       };
+
+                       user1@0x0bf80000 {
+                               reg = <0xbf80000 0x8B80000>;
+                       };
+
+                       user2@0x14b00000 {
+                               reg = <0x14b00000 0x500000>;
+                       };
+
+                       user3@0x15000000 {
+                               reg = <0x15000000 0x200000>;
+                       };
+               };
+       };
+};
+
 &msmgpio {
        pinctrl-0 = <&reset_out_pins>;
        pinctrl-names = "default";
-- 
1.7.9.5

Reply via email to