Hi Lorenzo,

On 2/27/2017 7:14 AM, Lorenzo Pieralisi wrote:
> PCI configuration space should be mapped with a memory region type that
> generates on the CPU host bus non-posted write transations. Update the
> driver to use the devm_pci_remap_cfg* interface to make sure the correct
> memory mappings for PCI configuration space are used.
> 
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieral...@arm.com>
> Cc: Bjorn Helgaas <bhelg...@google.com>
> Cc: Ray Jui <r...@broadcom.com>
> Cc: Jon Mason <jonma...@broadcom.com>
> ---
>  drivers/pci/host/pcie-iproc-platform.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/host/pcie-iproc-platform.c 
> b/drivers/pci/host/pcie-iproc-platform.c
> index f4909bb..b48d0db 100644
> --- a/drivers/pci/host/pcie-iproc-platform.c
> +++ b/drivers/pci/host/pcie-iproc-platform.c
> @@ -67,7 +67,8 @@ static int iproc_pcie_pltfm_probe(struct platform_device 
> *pdev)
>               return ret;
>       }
>  
> -     pcie->base = devm_ioremap(dev, reg.start, resource_size(&reg));
> +     pcie->base = devm_pci_remap_cfgspace(dev, reg.start,
> +                                          resource_size(&reg));

Note these are NOT config space registers; instead, they are host
controller registers. iProc PCIe controller access config space
registers indirectly through two of the controller registers instead of
directly mapped.

Thanks,

Ray

>       if (!pcie->base) {
>               dev_err(dev, "unable to map controller registers\n");
>               return -ENOMEM;
> 

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