Hi Linus,
please pull the following batch of updates for the Xtensa architecture.
The following changes since commit 5a7ad1146caa895ad718a534399e38bd2ba721b7:
Linux 4.11-rc8 (2017-04-23 16:53:00 -0700)
are available in the git repository at:
git://github.com/jcmvbkbc/linux-xtensa.git tags/xtensa-20170507
for you to fetch changes up to 2a4e669dd611855d89d938063c10f44cb67ce65d:
Merge branch 'xtensa-sim-params' into xtensa-fixes (2017-05-07 10:39:03 -0700)
----------------------------------------------------------------
Xtensa updates for v4.12
- clearly mark references to spilled register locations with SPILL_SLOT
macros;
- clean up xtensa ptrace: use generic tracehooks, move internal kernel
definitions from uapi/asm to asm, make locally-used functions static,
fix code style and alignment;
- use command line parameters passed to ISS as kernel command line.
----------------------------------------------------------------
Max Filippov (10):
xtensa: ISS: cleanup setup.c
xtensa: ISS: add argc/argv simcall definitions
xtensa: ISS: update kernel command line in platform_setup
xtensa: use ITLB_HIT_BIT instead of hardcoded number
xtensa: drop unused fast_io_protect function
xtensa: clean up xtensa/kernel/ptrace.c
xtensa: move internal ptrace definitions from uapi/asm to asm
xtensa: use generic tracehooks
xtensa: clean up access to spilled registers locations
Merge branch 'xtensa-sim-params' into xtensa-fixes
arch/xtensa/include/asm/processor.h | 15 ++
arch/xtensa/include/asm/ptrace.h | 39 +++++
arch/xtensa/include/uapi/asm/ptrace.h | 40 -----
arch/xtensa/kernel/coprocessor.S | 24 ---
arch/xtensa/kernel/entry.S | 3 +-
arch/xtensa/kernel/process.c | 8 +-
arch/xtensa/kernel/ptrace.c | 170 ++++++++++-----------
arch/xtensa/kernel/setup.c | 9 +-
arch/xtensa/kernel/signal.c | 10 +-
arch/xtensa/kernel/stacktrace.c | 35 +----
.../platforms/iss/include/platform/simcall.h | 20 +++
arch/xtensa/platforms/iss/setup.c | 43 +++---
12 files changed, 197 insertions(+), 219 deletions(-)
--
Thanks.
-- Max
