On Fri, May 19, 2017 at 11:29:05AM +0200, Peter Zijlstra wrote:
> On Fri, May 19, 2017 at 06:19:12PM +0800, Jin Yao wrote:
> > +bool skid_kernel_samples(struct perf_event *event, struct pt_regs *regs)
> > +{
> > + u64 ip;
> > +
> > + /*
> > + * Without PEBS, we may get kernel samples even though
> > + * exclude_kernel is specified due to skid in sampling.
> > + */
> > + if ((event->attr.exclude_kernel) &&
> > + (event->attr.sample_type & PERF_SAMPLE_IP)) {
> > + ip = perf_instruction_pointer(regs);
> > + if (kernel_ip(ip))
> > + return true;
> > + }
> > +
> > + return false;
> > +}
> > +
> > EVENT_ATTR(cpu-cycles, CPU_CYCLES );
> > EVENT_ATTR(instructions, INSTRUCTIONS );
> > EVENT_ATTR(cache-references, CACHE_REFERENCES );
>
>
> I would much rather see this in generic code, somewhere around
> __perf_event_overflow() I suppose. That would retain proper accounting
> for the interrupt rate etc..
>
> Also it would work for all architectures. Because I'm thinking more than
> just x86 will suffer from skid.
Yes, I think this will affect arm/arm64 too (and probably others that rely
on irqs for sampling the regs).
Will
