Hi Andy, David,

[ + Nico ]

On Fri, May 26, 2017 at 12:04:13AM +0800, Leo Yan wrote:
> Add debug unit on Qualcomm msm8916 based platforms, including the
> DragonBoard 410c board.

Could you take a look for this patch? After get your ACK I think
Mathieu could help pick up this patch through coresight repository.

If you want me to send a separate patch to you directly, also is okay.
Please let me know which is your preferring.

Thanks,
Leo Yan

> Reviewed-by: Mathieu Poirier <mathieu.poir...@linaro.org>
> Signed-off-by: Leo Yan <leo....@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi 
> b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index ab30939..17691ab 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -1116,6 +1116,38 @@
>                       };
>               };
>  
> +             debug@850000 {
> +                     compatible = "arm,coresight-cpu-debug","arm,primecell";
> +                     reg = <0x850000 0x1000>;
> +                     clocks = <&rpmcc RPM_QDSS_CLK>;
> +                     clock-names = "apb_pclk";
> +                     cpu = <&CPU0>;
> +             };
> +
> +             debug@852000 {
> +                     compatible = "arm,coresight-cpu-debug","arm,primecell";
> +                     reg = <0x852000 0x1000>;
> +                     clocks = <&rpmcc RPM_QDSS_CLK>;
> +                     clock-names = "apb_pclk";
> +                     cpu = <&CPU1>;
> +             };
> +
> +             debug@854000 {
> +                     compatible = "arm,coresight-cpu-debug","arm,primecell";
> +                     reg = <0x854000 0x1000>;
> +                     clocks = <&rpmcc RPM_QDSS_CLK>;
> +                     clock-names = "apb_pclk";
> +                     cpu = <&CPU2>;
> +             };
> +
> +             debug@856000 {
> +                     compatible = "arm,coresight-cpu-debug","arm,primecell";
> +                     reg = <0x856000 0x1000>;
> +                     clocks = <&rpmcc RPM_QDSS_CLK>;
> +                     clock-names = "apb_pclk";
> +                     cpu = <&CPU3>;
> +             };
> +
>               etm@85c000 {
>                       compatible = "arm,coresight-etm4x", "arm,primecell";
>                       reg = <0x85c000 0x1000>;
> -- 
> 2.7.4
> 

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