On Tue, May 30, 2017 at 9:21 PM, sathyanarayanan kuppuswamy <[email protected]> wrote: >> On Tue, May 30, 2017 at 3:47 AM, >> <[email protected]> wrote:
>>> + tristate "Intel USB Mux" >> >> It's indeed Intel's IP? > > Register map to control this MUX comes from Intel vendor defined XHCI > extended cap region of SOC. >> >> I would rather believe that it is some 3rd >> party known IP block with platform specific soldering. > > I don't think its platform specific support. I believe its a SOC specific > thing( mainly for CHT and APL SoCs). Okay, the best people to give a feedback here are Heikki and Hans. -- With Best Regards, Andy Shevchenko
