> > > > On Mon, May 29, 2017 at 02:52:39PM +0200, Peter Zijlstra wrote: > > > On Mon, May 29, 2017 at 02:46:37PM +0200, Jiri Olsa wrote: > > > > > > > for some reason I can't get single SMI count generated, is there a > > > > setup/bench that would provoke that? > > > > > > Not having SMIs is a good thing ;-) > > > > > > Not sure we can tickle them in a reliable way. > > > > yea I saw some counts last time, now just zero so I was wondering if > > it's working > > > > We have internal test case which can generate SMI, but I cannot publish the > test case. Sorry about that. >
APM_CNT (0xB2) could be used to trigger SMI#. It's documented in PCH datasheet. https://www.intel.com/content/dam/www/public/us/en/ documents/datasheets/9-series-chipset-pch-datasheet.pdf APM_CNT-Advanced Power Management Control Port Register I/O Address: B2h Attribute: R/W Default Value: 00h Size: 8 bits Lockable: No Usage: Legacy Only Power Well: Core Bit Description 7:0 Used to pass an APM command between the OS and the SMI handler. Writes to this port not only store data in the APMC register, but also generates an SMI# when the APMC_EN bit is set. You can write a byte to port 0xB2 to trigger an SMI# Thanks, Kan
