On Fri, Jun 09, 2017 at 05:09:25PM +0100, John Garry wrote: > At this point, we would rather concentrate on our new chipset, which > is based on same perf HW architecture (so much code reuse), but uses > directly mapped registers and *no djtag* - in this, most of the > upstream effort from all parties is not wasted.
FWIW, I suspect the MMIO-based PMU is going to have a smoother path upstream, assuming it's not shared with other agents (and we don't have another locking scheme to contend with). Thanks, Mark.
