On Tue, Jun 13, 2017 at 10:58:27AM -0500, Janakarajan Natarajan wrote:
> In Family 17h, L3 is the last level cache as opposed to L2 in previous
> families. Avoid this name confusion and rename X86_FEATURE_PERFCTR_L2 to
> X86_FEATURE_PERFCTR_LLC to indicate the performance counter on the last
> level of cache.
>
> Signed-off-by: Janakarajan Natarajan <[email protected]>
> ---
> arch/x86/events/amd/uncore.c | 2 +-
> arch/x86/include/asm/cpufeatures.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
A hint for the future:
when a reviewer gives you a Reviewed-by tag, you should add it to your
when patch you submit.
Thanks.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
