Commit-ID: 79a0d4d8f1ae9568a952c8e5928ee81b30c8df11 Gitweb: http://git.kernel.org/tip/79a0d4d8f1ae9568a952c8e5928ee81b30c8df11 Author: Marc Zyngier <marc.zyng...@arm.com> AuthorDate: Fri, 18 Aug 2017 09:39:23 +0100 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Fri, 18 Aug 2017 10:54:42 +0200
irqchip/hip04: Report that effective affinity is a single target The HIP04 driver only targets a single CPU at a time, even if the notional affinity is wider. Let's inform the core code about this. Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Thomas Gleixner <t...@linutronix.de> Cc: Andrew Lunn <and...@lunn.ch> Cc: James Hogan <james.ho...@imgtec.com> Cc: Jason Cooper <ja...@lakedaemon.net> Cc: Paul Burton <paul.bur...@imgtec.com> Cc: Chris Zankel <ch...@zankel.net> Cc: Kevin Cernekee <cerne...@gmail.com> Cc: Wei Xu <xuw...@hisilicon.com> Cc: Max Filippov <jcmvb...@gmail.com> Cc: Florian Fainelli <f.faine...@gmail.com> Cc: Gregory Clement <gregory.clem...@free-electrons.com> Cc: Matt Redfearn <matt.redfe...@imgtec.com> Cc: Sebastian Hesselbarth <sebastian.hesselba...@gmail.com> Link: http://lkml.kernel.org/r/20170818083925.10108-11-marc.zyng...@arm.com --- arch/arm/mach-hisi/Kconfig | 1 + drivers/irqchip/irq-hip04.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig index a3b091a..65a048f 100644 --- a/arch/arm/mach-hisi/Kconfig +++ b/arch/arm/mach-hisi/Kconfig @@ -39,6 +39,7 @@ config ARCH_HIP04 select HAVE_ARM_ARCH_TIMER select MCPM if SMP select MCPM_QUAD_CLUSTER if SMP + select GENERIC_IRQ_EFFECTIVE_AFF_MASK help Support for Hisilicon HiP04 SoC family diff --git a/drivers/irqchip/irq-hip04.c b/drivers/irqchip/irq-hip04.c index c1b4ee9..5b4fd2f 100644 --- a/drivers/irqchip/irq-hip04.c +++ b/drivers/irqchip/irq-hip04.c @@ -165,6 +165,8 @@ static int hip04_irq_set_affinity(struct irq_data *d, writel_relaxed(val | bit, reg); raw_spin_unlock(&irq_controller_lock); + irq_data_update_effective_affinity(d, cpumask_of(cpu)); + return IRQ_SET_MASK_OK; } #endif @@ -312,6 +314,7 @@ static int hip04_irq_domain_map(struct irq_domain *d, unsigned int irq, irq_set_chip_and_handler(irq, &hip04_irq_chip, handle_fasteoi_irq); irq_set_probe(irq); + irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(irq))); } irq_set_chip_data(irq, d->host_data); return 0;
