The membarrier system call now requires all architectures to implement
sync_core(). On Xtensa, it is provided by the EXTW instruction.
[ Completely untested! Can someone on the xtensa side confirm whether
EXTW is the right way to serialize core execution and try it out ? ]
Signed-off-by: Mathieu Desnoyers <mathieu.desnoy...@efficios.com>
CC: Peter Zijlstra <pet...@infradead.org>
CC: Paul E. McKenney <paul...@linux.vnet.ibm.com>
CC: Chris Zankel <ch...@zankel.net>
CC: Max Filippov <jcmvb...@gmail.com>
CC: linux-xte...@linux-xtensa.org
---
arch/xtensa/include/asm/processor.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/xtensa/include/asm/processor.h
b/arch/xtensa/include/asm/processor.h
index 30ee8c608853..b435bd6adbd6 100644
--- a/arch/xtensa/include/asm/processor.h
+++ b/arch/xtensa/include/asm/processor.h
@@ -248,5 +248,14 @@ static inline unsigned long get_er(unsigned long addr)
#endif /* XCHAL_HAVE_EXTERN_REGS */
+static inline void sync_core(void)
+{
+ /*
+ * Synchronize the core execution pipeline. Acts as a compiler
+ * barrier.
+ */
+ asm volatile ("extw" : : : "memory");
+}
+
#endif /* __ASSEMBLY__ */
#endif /* _XTENSA_PROCESSOR_H */
--
2.11.0
