On Fri, 29 Sep 2017 23:06:42 +0900 Masahiro Yamada <yamada.masah...@socionext.com> wrote:
> 2017-09-29 21:26 GMT+09:00 Boris Brezillon > <boris.brezil...@free-electrons.com>: > > On Fri, 29 Sep 2017 19:38:38 +0900 > > Masahiro Yamada <yamada.masah...@socionext.com> wrote: > > > >> 1/2 : add NAND_WAIT_TWHR and nand_whr_delay(). > >> You can set this new flag if you want nand_command(_lp) > >> to insert tWHR delay where needed. > >> > >> 2/2 : Fix Denali setup_data_interface. > >> Boris' suggestion in v1 was a good reminder that > >> made me realize tCCS was missing in the driver. Fix it now. > >> > >> > >> Changes in v2: > >> - Add nand_whr_delay() helper > >> Wait for tWHR only for drivers that explicitly set NAND_WAIT_TWHR flag > >> - newly added > >> > >> Masahiro Yamada (2): > >> mtd: nand: wait for tWHR after NAND_CMD_STATUS / NAND_CMD_READID > > > > Hm, I thought you were introducing this to then use it in the denali > > driver. Sorry, but I don't want to apply something that nobody needs. > > If someone ever complains about a missing delay I'll point him to your > > patch, but until then I'll keep the core unchanged. > > > At first, I thought this was necessary for me, > but I realized it was my misunderstanding. > > > Please let me explain one more. > > See commit 3158fa0e739615769cc047d2428f30f4c3b6640e. > > Prior to that commit, READID waited for #R/B transition, > it was wrong, so I fixed it. > > However, it dropped the delay completely. > If somebody was implicitly relying on the delay of chip->dev_ready, > the first byte might be read out before the valid data > is available. > > This was motivation of v1, where inserted ndelay(200) > unconditionally. Okay. Anyway, this extra delay is activated with an opt-in flag (I know, I'm the one who asked that), and noone set this flag in chip->options, so, if there's a bug, it's still here even after applying "mtd: nand: wait for tWHR after NAND_CMD_STATUS / NAND_CMD_READID". Honestly, I think all advanced controllers have the tWHR/tRHW timings enforced in the HW logic (configurable through a reg). This leaves basic controllers like the nand-gpio one, and even for these ones, the delay between the chip->cmd_ctrl(ADDR) and chip->read_buf() calls is probably long enough to hide the problem. Note that I'm absolutely not against this patch, it's just that I'd like to have a real user before merging this logic. > > > > > > >> mtd: nand: denali: fix setup_data_interface to meet tCCS delay > > > > This one is valid. I'll queue it to nand/next soon. > > If you drop 1/2, please let me do v3. > > V2 mentions NAND_WAIT_TWHR, this is strange. > Sure. > >
