From: Kan Liang <kan.li...@intel.com>

As of Skylake Server, there are a number of free-running counters in
each IIO Box that collect counts for per box IO clocks and per Port
Input/Output x BW/Utilization.

Freerunning counters cannot be written by SW. Counting will be suspended
only when the IIO Box is powered down.

The bit width of freerunning counter is 36-bit.

Signed-off-by: Kan Liang <kan.li...@intel.com>
---

Changes since V1:
 - Split the patch for SKX support

 arch/x86/events/intel/uncore_snbep.c | 58 ++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/arch/x86/events/intel/uncore_snbep.c 
b/arch/x86/events/intel/uncore_snbep.c
index db1fe37..5c8ba6b 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -3459,6 +3459,61 @@ static struct intel_uncore_ops skx_uncore_iio_ops = {
        .read_counter           = uncore_msr_read_counter,
 };
 
+enum perf_uncore_iio_freerunning_msr_type_id {
+       SKX_IIO_MSR_IOCLK                       = 0,
+       SKX_IIO_MSR_BW                          = 1,
+       SKX_IIO_MSR_UTIL                        = 2,
+
+       SKX_IIO_FREERUNNING_MSR_TYPE_MAX,
+};
+
+
+static struct freerunning_msr skx_iio_freerunning_msr[] = {
+       [SKX_IIO_MSR_IOCLK]     = { 0xa45, 0x20, 1, 36 },
+       [SKX_IIO_MSR_BW]        = { 0xb00, 0x10, 8, 36 },
+       [SKX_IIO_MSR_UTIL]      = { 0xb08, 0x10, 8, 36 },
+};
+
+static struct uncore_event_desc skx_uncore_iio_events[] = {
+       /* Free-Running IO CLOCKS Counter */
+       INTEL_UNCORE_EVENT_DESC(ioclk,                  
"event=0xff,umask=0x10"),
+       /* Free-Running IIO Bandwidth Counters */
+       INTEL_UNCORE_EVENT_DESC(bw_in_port0,            
"event=0xff,umask=0x20"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale,      "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port0.unit,       "MiB"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port1,            
"event=0xff,umask=0x21"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale,      "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port1.unit,       "MiB"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port2,            
"event=0xff,umask=0x22"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale,      "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port2.unit,       "MiB"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port3,            
"event=0xff,umask=0x23"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale,      "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(bw_in_port3.unit,       "MiB"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port0,           
"event=0xff,umask=0x24"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port0.scale,     "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port0.unit,      "MiB"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port1,           
"event=0xff,umask=0x25"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port1.scale,     "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port1.unit,      "MiB"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port2,           
"event=0xff,umask=0x26"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port2.scale,     "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port2.unit,      "MiB"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port3,           
"event=0xff,umask=0x27"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port3.scale,     "3.814697266e-6"),
+       INTEL_UNCORE_EVENT_DESC(bw_out_port3.unit,      "MiB"),
+       /* Free-running IIO Utilization Counters */
+       INTEL_UNCORE_EVENT_DESC(util_in_port0,          
"event=0xff,umask=0x30"),
+       INTEL_UNCORE_EVENT_DESC(util_out_port0,         
"event=0xff,umask=0x31"),
+       INTEL_UNCORE_EVENT_DESC(util_in_port1,          
"event=0xff,umask=0x32"),
+       INTEL_UNCORE_EVENT_DESC(util_out_port1,         
"event=0xff,umask=0x33"),
+       INTEL_UNCORE_EVENT_DESC(util_in_port2,          
"event=0xff,umask=0x34"),
+       INTEL_UNCORE_EVENT_DESC(util_out_port2,         
"event=0xff,umask=0x35"),
+       INTEL_UNCORE_EVENT_DESC(util_in_port3,          
"event=0xff,umask=0x36"),
+       INTEL_UNCORE_EVENT_DESC(util_out_port3,         
"event=0xff,umask=0x37"),
+       { /* end: all zeroes */ },
+};
+
 static struct intel_uncore_type skx_uncore_iio = {
        .name                   = "iio",
        .num_counters           = 4,
@@ -3470,8 +3525,11 @@ static struct intel_uncore_type skx_uncore_iio = {
        .event_mask_ext         = SKX_IIO_PMON_RAW_EVENT_MASK_EXT,
        .box_ctl                = SKX_IIO0_MSR_PMON_BOX_CTL,
        .msr_offset             = SKX_IIO_MSR_OFFSET,
+       .num_freerunning_types  = SKX_IIO_FREERUNNING_MSR_TYPE_MAX,
+       .freerunning            = skx_iio_freerunning_msr,
        .constraints            = skx_uncore_iio_constraints,
        .ops                    = &skx_uncore_iio_ops,
+       .event_descs            = skx_uncore_iio_events,
        .format_group           = &skx_uncore_iio_format_group,
 };
 
-- 
2.7.4

Reply via email to