On Tue, Dec 19, 2017 at 12:51:16PM +0200, Peter Ujfalusi wrote: > From: Vignesh R <[email protected]> > > Register layout of a typical TPCC_EVT_MUX_M_N register is such that the > lowest numbered event is at the lowest byte address and highest numbered > event at highest byte address. But TPCC_EVT_MUX_60_63 register layout is > different, in that the lowest numbered event is at the highest address > and highest numbered event is at the lowest address. Therefore, modify > ti_am335x_xbar_write() to handle TPCC_EVT_MUX_60_63 register > accordingly.
Applied, thanks -- ~Vinod
