On Wed, Jan 3, 2018 at 3:09 PM, Anson Huang <[email protected]> wrote: > There is a test divider and post divider in video PLL, > test divider is placed before post divider, all clocks > that can select parent from video PLL should be from > post divider, NOT from pll_video_main, below are > clock tree dump before and after this patch: > > Before: > pll_video_main > pll_video_main_bypass > pll_video_main_clk > lcdif_pixel_src > lcdif_pixel_cg > lcdif_pixel_pre_div > lcdif_pixel_post_div > lcdif_pixel_root_clk > After: > pll_video_main > pll_video_main_bypass > pll_video_main_clk > pll_video_test_div > pll_video_post_div > lcdif_pixel_src > lcdif_pixel_cg > lcdif_pixel_pre_div > lcdif_pixel_post_div > lcdif_pixel_root_clk > > Signed-off-by: Anson Huang <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
