Hello, On Thu, Jan 04, 2018 at 06:15:01PM +0100, Paolo Bonzini wrote: > On 04/01/2018 18:13, Dave Hansen wrote: > > On 01/04/2018 08:25 AM, Andrea Arcangeli wrote: > >> It's only where SPEC_CTRL is missing and only IBPB_SUPPORT is > >> available, that ibrs 0 ibpb 2 is the only option to fix variant#2 for > >> good. > > > > Could you help us decode what "ibrs 0 ibpb 2" means to you? > > IBRS 0 = disabled > IBRS 1 = only kernel sets IBRS=1 > IBRS 2 = indirect branch prediction fully disabled, or do the right > thing on future processors > > IBPB 0 = disabled > IBPB 1 = on context switch > IBPB 2 = on every kernel or hypervisor entry
Yes. ibrs 0 ibpb 2 kernel entry and vmexit. ibpb 2 if set, is forcing ibrs to 0 (it's sharing the same branch in the kernel entry points and it wouldn't make sense anyway to enable ibrs with ibpb 2). ibrs 0 ibpb 2 is only ever activated if SPEC_CTRL is missing but IBPB_SUPPORT is present and it does the same as stuff_RSB, imagine it like a stuff_IBP where stuff_RSB is already called.