Add some helper macros to save/restore MSR_IA32_SPEC_CTRL.
Although we could use the spec_ctrl_unprotected_begin/end macros they seem
be bit unreadable for some uses.
spec_ctrl_get - read MSR_IA32_SPEC_CTRL to save
spec_ctrl_set - write value restore MSR_IA32_SPEC_CTRL
spec_ctrl_restriction_off - same as spec_ctrl_unprotected_begin
spec_ctrl_restriction_on - same as spec_ctrl_unprotected_end
Signed-off-by: Ashok Raj <ashok....@intel.com>
---
arch/x86/include/asm/spec_ctrl.h | 12 ++++++++++++
arch/x86/kernel/cpu/spec_ctrl.c | 11 +++++++++++
2 files changed, 23 insertions(+)
diff --git a/arch/x86/include/asm/spec_ctrl.h b/arch/x86/include/asm/spec_ctrl.h
index 2dfa31b..926feb2 100644
--- a/arch/x86/include/asm/spec_ctrl.h
+++ b/arch/x86/include/asm/spec_ctrl.h
@@ -9,6 +9,10 @@
void spec_ctrl_scan_feature(struct cpuinfo_x86 *c);
void spec_ctrl_unprotected_begin(void);
void spec_ctrl_unprotected_end(void);
+void spec_ctrl_set(u64 val);
+
+#define spec_ctrl_restriction_on spec_ctrl_unprotected_end
+#define spec_ctrl_restriction_off spec_ctrl_unprotected_begin
static inline u64 native_rdmsrl(unsigned int msr)
{
@@ -34,4 +38,12 @@ static inline void __enable_indirect_speculation(void)
native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_DISABLE_IBRS);
}
+static inline u64 spec_ctrl_get(void)
+{
+ u64 val;
+
+ val = native_rdmsrl(MSR_IA32_SPEC_CTRL);
+
+ return val;
+}
#endif /* _ASM_X86_SPEC_CTRL_H */
diff --git a/arch/x86/kernel/cpu/spec_ctrl.c b/arch/x86/kernel/cpu/spec_ctrl.c
index 9e9d013..02fc630 100644
--- a/arch/x86/kernel/cpu/spec_ctrl.c
+++ b/arch/x86/kernel/cpu/spec_ctrl.c
@@ -47,3 +47,14 @@ void spec_ctrl_unprotected_end(void)
__disable_indirect_speculation();
}
EXPORT_SYMBOL_GPL(spec_ctrl_unprotected_end);
+
+void spec_ctrl_set(u64 val)
+{
+ if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) {
+ if (!val) {
+ spec_ctrl_restriction_off();
+ } else
+ spec_ctrl_restriction_on();
+ }
+}
+EXPORT_SYMBOL(spec_ctrl_set);
--
2.7.4
