On Tue, Jan 02, 2018 at 11:31:22AM +0000, Matt Redfearn wrote: > Currently the bits to be masked when watchhi is read is defined inline > for each register. To avoid this, define the bits once and mask each > register with that value. > > Signed-off-by: Matt Redfearn <[email protected]>
Reviewed-by: James Hogan <[email protected]> Cheers James > --- > > arch/mips/kernel/watch.c | 14 ++++++-------- > 1 file changed, 6 insertions(+), 8 deletions(-) > > diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c > index 329d2209521d..0e61a5b7647f 100644 > --- a/arch/mips/kernel/watch.c > +++ b/arch/mips/kernel/watch.c > @@ -48,21 +48,19 @@ void mips_read_watch_registers(void) > { > struct mips3264_watch_reg_state *watches = > ¤t->thread.watch.mips3264; > + unsigned int watchhi_mask = MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW; > + > switch (current_cpu_data.watch_reg_use_cnt) { > default: > BUG(); > case 4: > - watches->watchhi[3] = (read_c0_watchhi3() & > - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW)); > + watches->watchhi[3] = (read_c0_watchhi3() & watchhi_mask); > case 3: > - watches->watchhi[2] = (read_c0_watchhi2() & > - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW)); > + watches->watchhi[2] = (read_c0_watchhi2() & watchhi_mask); > case 2: > - watches->watchhi[1] = (read_c0_watchhi1() & > - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW)); > + watches->watchhi[1] = (read_c0_watchhi1() & watchhi_mask); > case 1: > - watches->watchhi[0] = (read_c0_watchhi0() & > - (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW)); > + watches->watchhi[0] = (read_c0_watchhi0() & watchhi_mask); > } > if (current_cpu_data.watch_reg_use_cnt == 1 && > (watches->watchhi[0] & MIPS_WATCHHI_IRW) == 0) { > -- > 2.7.4 > >
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