From: Archana Sathyakumar <[email protected]> Add device binding documentation for the PDC Interrupt controller on QCOM SoC's like the SDM845. The interrupt-controller can be used to sense edge low interrupts and wakeup interrupts when the GIC is non-operational.
Cc: [email protected] Signed-off-by: Archana Sathyakumar <[email protected]> Signed-off-by: Lina Iyer <[email protected]> --- .../bindings/interrupt-controller/qcom,pdc.txt | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt new file mode 100644 index 000000000000..c4592bbf678d --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt @@ -0,0 +1,55 @@ +PDC interrupt controller + +Qualcomm Technologies Inc. SoCs based on the RPM Hardened archicture have a +Power Domain Controller (PDC) that is on always-on domain. In addition to +providing power control for the power domains, the hardware also has an +interrupt controller that can be used to help detect edge low interrupts as +well detect interrupts when the GIC is non-operational. + +GIC is parent interrupt controller at the highest level. Platform interrupt +controller PDC is next in hierarchy, followed by others. This driver only +configures the interrupts, does not handle them. + +Properties: + +- compatible: + Usage: required + Value type: <string> + Definition: Should contain "qcom,pdc" and "qcom,pdc-<target>" + - "qcom,pdc-sdm845": For sdm845 pin data + +- reg: + Usage: required + Value type: <prop-encoded-array> + Definition: Specifies the base physical address for PDC hardware. + +- interrupt-cells: + Usage: required + Value type: <u32> + Definition: Specifies the number of cells needed to encode an interrupt + source. + Value must be 3. + The encoding of these cells are same as described in [1]. + +- interrupt-parent: + Usage: required + Value type: <phandle> + Definition: Specifies the interrupt parent necessary for hierarchical + domain to operate. + +- interrupt-controller: + Usage: required + Value type: <bool> + Definition: Identifies the node as an interrupt controller. + +Example: + + pdc: interrupt-controller@b220000 { + compatible = "qcom,pdc", "qcom,pdc-sdm845"; + reg = <0xb220000 0x30000>; + #interrupt-cells = <3>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + +[1]. Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
