On Tue, 23 Jan 2018 16:52:55 +0000
David Woodhouse <d...@amazon.co.uk> wrote:
> When they advertise the IA32_ARCH_CAPABILITIES MSR and it has the RDCL_NO
> bit set, they don't need KPTI either.
This is starting to get messy because we will eventually need to integrate
AMD processors - no meltdown but spectre
VIA processors - probably no vulnerabilities at
least on the old ones
Intel with ND set - No meltdown
Anybody with no speculation - No meltdown, no spectre, no id bit
and it expands a lot with all sorts of 32bit processors. Would it make
more sense to make it table driven or do we want a separate function so
we can do:
if (!in_order_cpu()) {
}
around the whole lot ? I'm guessing the latter makes sense then
somethhing like this patch I'm running on my old atom widgets in 64bit
mode
static __initdata struct x86_cpu_id cpu_in_order[] = {
{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CEDARVIEW, X86_FEATURE_ANY },
{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CLOVERVIEW, X86_FEATURE_ANY },
{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_LINCROFT, X86_FEATURE_ANY },
{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PENWELL, X86_FEATURE_ANY },
{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PINEVIEW, X86_FEATURE_ANY },
{}
};
static int in_order_cpu(void)
{
/* Processors with CPU id etc */
if (x86_match_cpu(cpu_in_order))
return 1;
/* Other rules here */
return 0;
}
Alan
