On Tue, Feb 13, 2018 at 3:24 AM, Wu Hao <[email protected]> wrote:
Hi Hao,
I acked this back in v2.
> On DFL FPGA devices, the Accelerated Function Unit (AFU), can be
> reprogrammed for different functions. It connects to the FPGA
> infrastructure("blue bistream") via a Port. Port CSRs are implemented
> separately from the AFU CSRs to provide control and status of the Port.
> Once valid green bitstream is programmed into the AFU, it allows access
> to the AFU CSRs in the AFU MMIO space.
>
> This patch only implements basic driver framework for AFU, including
> device file operation framework.
>
> Signed-off-by: Tim Whisonant <[email protected]>
> Signed-off-by: Enno Luebbers <[email protected]>
> Signed-off-by: Shiva Rao <[email protected]>
> Signed-off-by: Christopher Rauer <[email protected]>
> Signed-off-by: Xiao Guangrong <[email protected]>
> Signed-off-by: Wu Hao <[email protected]>
Acked-by: Alan Tull <[email protected]>
Alan
