On Mon, 2018-07-02 at 13:18 +0300, Andy Shevchenko wrote: > On Mon, 2018-07-02 at 18:04 +0800, Jisheng Zhang wrote: > > For Synopsys DesignWare 8250 uart which version >= 4.00a, there's a > > valid divisor latch fraction register. The fractional divisor width > > is > > 4bits ~ 6bits. > > > > There are several serial IPs that have fractional divider built-in. > None > is using any specific hooks. Why do you need in your case, esp. taking > into consideration that we have a custom ->set_termios() callback?
Okay, I see that in 8250 we have hooks embedded into 8250_port.c which is not the best solution. For example it prevents better splitting Exar code. So, we would need these hooks, but better to integrate them in the same way like it's done for the rest of 8250 ones, i.e. - rename existing to have a "do" word - create new functions which would be a replacement that choose between "do" variant and custom one - not sure if we need to export "do" variants (at least for now) > > > patch1 introduces necessary hooks to 8250 core. > > patch2 implement the fractional divisor support for Synopsys DW > > 8250. > > > > Jisheng Zhang (2): > > serial: 8250: introduce get_divisor() and set_divisor() hook > > serial: 8250_dw: add fractional divisor support > > > > drivers/tty/serial/8250/8250_core.c | 4 +++ > > drivers/tty/serial/8250/8250_dw.c | 54 > > +++++++++++++++++++++++++++++ > > drivers/tty/serial/8250/8250_port.c | 8 +++++ > > include/linux/serial_8250.h | 7 ++++ > > 4 files changed, 73 insertions(+) > > > > -- Andy Shevchenko <andriy.shevche...@linux.intel.com> Intel Finland Oy