On 12/07/18 11:07, Stefan Agner wrote:
> In the uSDHC case (e.g. i.MX 6) clocks only get disabled if frequency
> is set to 0. However, it could be that the stack asks for a frequency
> change while clocks are on. In that case the function clears the
> divider registers (by clearing ESDHC_CLOCK_MASK) while the clock is
> enabled! This causes a short period of time where the clock is
> undivided (on a i.MX 6DL a clock of 196MHz has been measured).
>
> For older IP variants the driver disables clock by clearing some bits
> in ESDHC_SYSTEM_CONTROL.
>
> Make sure to disable card clock before changing frequency for uSDHC
> IP variants too.
>
> Signed-off-by: Stefan Agner <ste...@agner.ch>
Acked-by: Adrian Hunter <adrian.hun...@intel.com>
> ---
> drivers/mmc/host/sdhci-esdhc-imx.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
> b/drivers/mmc/host/sdhci-esdhc-imx.c
> index 85fd5a8b0b6d..acacd8481473 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -708,14 +708,14 @@ static inline void esdhc_pltfm_set_clock(struct
> sdhci_host *host,
> int div = 1;
> u32 temp, val;
>
> + if (esdhc_is_usdhc(imx_data)) {
> + val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
> + writel(val & ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON,
> + host->ioaddr + ESDHC_VENDOR_SPEC);
> + }
> +
> if (clock == 0) {
> host->mmc->actual_clock = 0;
> -
> - if (esdhc_is_usdhc(imx_data)) {
> - val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
> - writel(val & ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON,
> - host->ioaddr + ESDHC_VENDOR_SPEC);
> - }
> return;
> }
>
>
