Commit-ID:  e5862d0515ad970ccec6208ecf5bb0cffe291ea3
Gitweb:     https://git.kernel.org/tip/e5862d0515ad970ccec6208ecf5bb0cffe291ea3
Author:     Joerg Roedel <jroe...@suse.de>
AuthorDate: Wed, 18 Jul 2018 11:40:45 +0200
Committer:  Thomas Gleixner <t...@linutronix.de>
CommitDate: Fri, 20 Jul 2018 01:11:37 +0200

x86/entry/32: Leave the kernel via trampoline stack

Switch back to the trampoline stack before returning to userspace.

Signed-off-by: Joerg Roedel <jroe...@suse.de>
Signed-off-by: Thomas Gleixner <t...@linutronix.de>
Tested-by: Pavel Machek <pa...@ucw.cz>
Cc: "H . Peter Anvin" <h...@zytor.com>
Cc: linux...@kvack.org
Cc: Linus Torvalds <torva...@linux-foundation.org>
Cc: Andy Lutomirski <l...@kernel.org>
Cc: Dave Hansen <dave.han...@intel.com>
Cc: Josh Poimboeuf <jpoim...@redhat.com>
Cc: Juergen Gross <jgr...@suse.com>
Cc: Peter Zijlstra <pet...@infradead.org>
Cc: Borislav Petkov <b...@alien8.de>
Cc: Jiri Kosina <jkos...@suse.cz>
Cc: Boris Ostrovsky <boris.ostrov...@oracle.com>
Cc: Brian Gerst <brge...@gmail.com>
Cc: David Laight <david.lai...@aculab.com>
Cc: Denys Vlasenko <dvlas...@redhat.com>
Cc: Eduardo Valentin <edu...@amazon.com>
Cc: Greg KH <gre...@linuxfoundation.org>
Cc: Will Deacon <will.dea...@arm.com>
Cc: aligu...@amazon.com
Cc: daniel.gr...@iaik.tugraz.at
Cc: hu...@google.com
Cc: keesc...@google.com
Cc: Andrea Arcangeli <aarca...@redhat.com>
Cc: Waiman Long <ll...@redhat.com>
Cc: "David H . Gutteridge" <dhgutteri...@sympatico.ca>
Cc: j...@8bytes.org
Link: 
https://lkml.kernel.org/r/1531906876-13451-9-git-send-email-j...@8bytes.org

---
 arch/x86/entry/entry_32.S | 79 +++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 77 insertions(+), 2 deletions(-)

diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
index fea49ec345ba..a905e6215ea9 100644
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -342,6 +342,60 @@
 .Lend_\@:
 .endm
 
+/*
+ * Switch back from the kernel stack to the entry stack.
+ *
+ * The %esp register must point to pt_regs on the task stack. It will
+ * first calculate the size of the stack-frame to copy, depending on
+ * whether we return to VM86 mode or not. With that it uses 'rep movsl'
+ * to copy the contents of the stack over to the entry stack.
+ *
+ * We must be very careful here, as we can't trust the contents of the
+ * task-stack once we switched to the entry-stack. When an NMI happens
+ * while on the entry-stack, the NMI handler will switch back to the top
+ * of the task stack, overwriting our stack-frame we are about to copy.
+ * Therefore we switch the stack only after everything is copied over.
+ */
+.macro SWITCH_TO_ENTRY_STACK
+
+       ALTERNATIVE     "", "jmp .Lend_\@", X86_FEATURE_XENPV
+
+       /* Bytes to copy */
+       movl    $PTREGS_SIZE, %ecx
+
+#ifdef CONFIG_VM86
+       testl   $(X86_EFLAGS_VM), PT_EFLAGS(%esp)
+       jz      .Lcopy_pt_regs_\@
+
+       /* Additional 4 registers to copy when returning to VM86 mode */
+       addl    $(4 * 4), %ecx
+
+.Lcopy_pt_regs_\@:
+#endif
+
+       /* Initialize source and destination for movsl */
+       movl    PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %edi
+       subl    %ecx, %edi
+       movl    %esp, %esi
+
+       /* Save future stack pointer in %ebx */
+       movl    %edi, %ebx
+
+       /* Copy over the stack-frame */
+       shrl    $2, %ecx
+       cld
+       rep movsl
+
+       /*
+        * Switch to entry-stack - needs to happen after everything is
+        * copied because the NMI handler will overwrite the task-stack
+        * when on entry-stack
+        */
+       movl    %ebx, %esp
+
+.Lend_\@:
+.endm
+
 /*
  * %eax: prev task
  * %edx: next task
@@ -581,25 +635,45 @@ ENTRY(entry_SYSENTER_32)
 
 /* Opportunistic SYSEXIT */
        TRACE_IRQS_ON                   /* User mode traces as IRQs on. */
+
+       /*
+        * Setup entry stack - we keep the pointer in %eax and do the
+        * switch after almost all user-state is restored.
+        */
+
+       /* Load entry stack pointer and allocate frame for eflags/eax */
+       movl    PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %eax
+       subl    $(2*4), %eax
+
+       /* Copy eflags and eax to entry stack */
+       movl    PT_EFLAGS(%esp), %edi
+       movl    PT_EAX(%esp), %esi
+       movl    %edi, (%eax)
+       movl    %esi, 4(%eax)
+
+       /* Restore user registers and segments */
        movl    PT_EIP(%esp), %edx      /* pt_regs->ip */
        movl    PT_OLDESP(%esp), %ecx   /* pt_regs->sp */
 1:     mov     PT_FS(%esp), %fs
        PTGS_TO_GS
+
        popl    %ebx                    /* pt_regs->bx */
        addl    $2*4, %esp              /* skip pt_regs->cx and pt_regs->dx */
        popl    %esi                    /* pt_regs->si */
        popl    %edi                    /* pt_regs->di */
        popl    %ebp                    /* pt_regs->bp */
-       popl    %eax                    /* pt_regs->ax */
+
+       /* Switch to entry stack */
+       movl    %eax, %esp
 
        /*
         * Restore all flags except IF. (We restore IF separately because
         * STI gives a one-instruction window in which we won't be interrupted,
         * whereas POPF does not.)
         */
-       addl    $PT_EFLAGS-PT_DS, %esp  /* point esp at pt_regs->flags */
        btrl    $X86_EFLAGS_IF_BIT, (%esp)
        popfl
+       popl    %eax
 
        /*
         * Return back to the vDSO, which will pop ecx and edx.
@@ -668,6 +742,7 @@ ENTRY(entry_INT80_32)
 
 restore_all:
        TRACE_IRQS_IRET
+       SWITCH_TO_ENTRY_STACK
 .Lrestore_all_notrace:
        CHECK_AND_APPLY_ESPFIX
 .Lrestore_nocheck:

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