[PATCH v3 09/18] dmaengine: dma-jz4780: Add support for the JZ4725B SoC

[Paul Cercueil]

The JZ4725B has one DMA core starring six DMA channels.
As for the JZ4770, each DMA channel's clock can be enabled with
a register write, the difference here being that once started, it
is not possible to turn it off.

Signed-off-by: Paul Cercueil <p...@crapouillou.net>
Tested-by: Mathieu Malaterre <ma...@debian.org>
Reviewed-by: PrasannaKumar Muralidharan <prasannatsmku...@gmail.com>
---
 drivers/dma/dma-jz4780.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

 v2: - Add comments about channel enabling/disabling
     - The documentation update is now in patch 01/17

 v3: No change

diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
index 084d4023637e..88ce3f0157f6 100644
--- a/drivers/dma/dma-jz4780.c
+++ b/drivers/dma/dma-jz4780.c
@@ -136,6 +136,7 @@ struct jz4780_dma_chan {
 
 enum jz_version {
        ID_JZ4740,
+       ID_JZ4725B,
        ID_JZ4770,
        ID_JZ4780,
 };
@@ -209,8 +210,12 @@ static inline void jz4780_dma_ctrl_writel(struct 
jz4780_dma_dev *jzdma,
 static inline void jz4780_dma_chan_enable(struct jz4780_dma_dev *jzdma,
        unsigned int chn)
 {
-       if (jzdma->version == ID_JZ4770)
+       if (jzdma->version == ID_JZ4770) {
                jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKES, BIT(chn));
+       } else if (jzdma->version == ID_JZ4725B) {
+               /* JZ4725B has no DCKES, it uses DCKE to enable channels */
+               jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKE, BIT(chn));
+       }
 }
 
 static inline void jz4780_dma_chan_disable(struct jz4780_dma_dev *jzdma,
@@ -218,6 +223,8 @@ static inline void jz4780_dma_chan_disable(struct 
jz4780_dma_dev *jzdma,
 {
        if (jzdma->version == ID_JZ4770)
                jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKEC, BIT(chn));
+
+       /* On JZ4725B it is not possible to stop a DMA channel once enabled */
 }
 
 static struct jz4780_dma_desc *jz4780_dma_desc_alloc(
@@ -805,12 +812,14 @@ static struct dma_chan *jz4780_of_dma_xlate(struct 
of_phandle_args *dma_spec,
 
 static const struct jz4780_dma_soc_data jz4780_dma_soc_data[] = {
        [ID_JZ4740] = { .nb_channels = 6, .transfer_ord_max = 5, },
+       [ID_JZ4725B] = { .nb_channels = 6, .transfer_ord_max = 5, },
        [ID_JZ4770] = { .nb_channels = 6, .transfer_ord_max = 6, },
        [ID_JZ4780] = { .nb_channels = 32, .transfer_ord_max = 7, },
 };
 
 static const struct of_device_id jz4780_dma_dt_match[] = {
        { .compatible = "ingenic,jz4740-dma", .data = (void *)ID_JZ4740 },
+       { .compatible = "ingenic,jz4725b-dma", .data = (void *)ID_JZ4725B },
        { .compatible = "ingenic,jz4770-dma", .data = (void *)ID_JZ4770 },
        { .compatible = "ingenic,jz4780-dma", .data = (void *)ID_JZ4780 },
        {},
-- 
2.11.0