Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced Error Interrupt Message Number. The controller has dedicated interrupt line for reporting PCIe errors along with AER.
Since pcie-xilinx-nwl.c is platform driver and AER uses irq from pci_dev, using struct device_node private data to save xilinx controller error irq line. Using PCI quirks this data is passed to sysdata of root port pci_dev which is retrieved and used for AER handler registration. Bharat Kumar Gogada (3): PCI: xilinx-nwl: Save error IRQ number in device_node private data PCI: Use dedicated Xilinx controller irq number for AER PCI/portdrv: Add support for sharing xilinx controller irq with AER drivers/pci/controller/pcie-xilinx-nwl.c | 6 ++++++ drivers/pci/pcie/portdrv_core.c | 4 ++++ drivers/pci/quirks.c | 29 +++++++++++++++++++++++++++++ 3 files changed, 39 insertions(+), 0 deletions(-)
