On Mon, Sep 10, 2018 at 10:05:42PM +0530, Anup Patel wrote:
> I am quite sure RISC-V spec does not restrict the use of other
> local interrupts. Different CPU implementations can have their
> own local interrupts.

Please take a look at sections 3.1.14 and 4.1.1 of the RISC-V privileged
spec 1.10.

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