Hi Quentin, > > 1. use of a single memory barrier > > > > Since we are already em_pd_mutex protected, i.e. there cannot be a > > concurrent writers, we can use one single memory barrier after the > > loop, i.e. > > > > for_each_cpu(cpu, span) > > WRITE_ONCE() > > smp_wmb() > > > > which should be just enough to ensure that all other CPUs will see > > the pointer set once we release the mutex > > Right, I'm actually wondering if the memory barrier is needed at all ... > The mutex lock()/unlock() should already ensure the ordering I want no ? > > WRITE_ONCE() should prevent load/store tearing with concurrent em_cpu_get(), > and the release/acquire semantics of mutex lock/unlock should be enough to > serialize the memory accesses of concurrent em_register_perf_domain() calls > properly ... > > Hmm, let me read memory-barriers.txt again.
FYI, the directory "tools/memory-model/" provides an "automated memory-barriers.txt": in short, you encode your "memory ordering questions" into "litmus tests" to be passed to the tool/simulator; the tool will then answer with "Yes/No" (plus other information). Some preparation is required to set up and learn how to use the LKMM tools, but once there, I expect them to be more "efficient" than reading memory-barriers.txt... ;-) Please don't hesitate to contact me/the LKMM maintainers if you need help with this. You'd need some info in order to write down a _well-formed litmus test, e.g., matching barrier/synchronization and interested memory accesses on the reader side (IAC, the replacement "store-release -> store-once+smp_wmb" discussed above is suspicious...). Andrea
