On Wed, Nov 14, 2018 at 02:25:18PM +0000, Chris Wilson wrote: > I am not aware of what the consequences are of bumping this limit, so > please take the patch with a pinch of salt and more of a heads up!
Yeah, this will only make your warning go away, but is not suitable for upstream. The upstream icelake enablement would be a much larger patch that actually enables the new PMU features. So I suggest you carry this in your CI tree until the icelake patches are allowed to go public. > diff --git a/arch/x86/include/asm/perf_event.h > b/arch/x86/include/asm/perf_event.h > index 8bdf74902293..ab4cf7c12c40 100644 > --- a/arch/x86/include/asm/perf_event.h > +++ b/arch/x86/include/asm/perf_event.h > @@ -7,7 +7,7 @@ > */ > > #define INTEL_PMC_MAX_GENERIC 32 > -#define INTEL_PMC_MAX_FIXED 3 > +#define INTEL_PMC_MAX_FIXED 4 > #define INTEL_PMC_IDX_FIXED 32 > > #define X86_PMC_IDX_MAX 64 > -- > 2.19.1 >
