From: Matt Sealey <[email protected]> ARMv6 Thumb state introduced an RBIT instruction which, combined with CLZ as present in ARMv5, introduces an extremely fast path for counting trailing zeroes.
Enable the use of the GCC builtin for this on ARMv6+ with CONFIG_THUMB2_KERNEL to ensure we get the 'new' instruction usage. We do not bother enabling LZO_USE_CTZ64 support for ARMv5 as the builtin code path does the same thing as the LZO_USE_CTZ32 code, only with more register pressure. Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Matt Sealey <[email protected]> Signed-off-by: Dave Rodgman <[email protected]> Cc: David S. Miller <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Herbert Xu <[email protected]> Cc: Markus F.X.J. Oberhumer <[email protected]> Cc: Minchan Kim <[email protected]> Cc: Nitin Gupta <[email protected]> Cc: Richard Purdie <[email protected]> Cc: Sergey Senozhatsky <[email protected]> Cc: Sonny Rao <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Stephen Rothwell <[email protected]> --- lib/lzo/lzodefs.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/lib/lzo/lzodefs.h b/lib/lzo/lzodefs.h index e1b3cf6459a9..c0193f726db0 100644 --- a/lib/lzo/lzodefs.h +++ b/lib/lzo/lzodefs.h @@ -33,9 +33,14 @@ #define LZO_USE_CTZ32 1 #elif defined(CONFIG_X86) || defined(CONFIG_PPC) #define LZO_USE_CTZ32 1 -#elif defined(CONFIG_ARM) && (__LINUX_ARM_ARCH__ >= 5) +#elif defined(CONFIG_ARM) +#if (__LINUX_ARM_ARCH__ >= 5) #define LZO_USE_CTZ32 1 #endif +#if (__LINUX_ARM_ARCH__ >= 6) && defined(CONFIG_THUMB2_KERNEL) +#define LZO_USE_CTZ64 1 +#endif +#endif #define M1_MAX_OFFSET 0x0400 #define M2_MAX_OFFSET 0x0800 -- 2.17.1
