Hi, On 19/12/2018 12:42, Kishon Vijay Abraham I wrote: > Platforms which populate msi_host_init, has it's own MSI controller > logic. Writing to MSI control registers on platforms which doesn't use > Designware's MSI controller logic might have side effects. To > be safe, do not write to MSI control registers if the platform uses > it's own MSI controller logic instead of Designware's MSI controller > logic. > > Signed-off-by: Kishon Vijay Abraham I <[email protected]> > --- > .../pci/controller/dwc/pcie-designware-host.c | 24 ++++++++++--------- > 1 file changed, 13 insertions(+), 11 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c > b/drivers/pci/controller/dwc/pcie-designware-host.c > index dbc94f3be3d5..6644a5683b2b 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -647,17 +647,19 @@ void dw_pcie_setup_rc(struct pcie_port *pp) > > dw_pcie_setup(pci); > > - num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; > - > - /* Initialize IRQ Status array */ > - for (ctrl = 0; ctrl < num_ctrls; ctrl++) { > - dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + > - (ctrl * MSI_REG_CTRL_BLOCK_SIZE), > - 4, ~0); > - dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + > - (ctrl * MSI_REG_CTRL_BLOCK_SIZE), > - 4, ~0); > - pp->irq_status[ctrl] = 0; > + if (!pp->ops->msi_host_init) { > + num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; > + > + /* Initialize IRQ Status array */ > + for (ctrl = 0; ctrl < num_ctrls; ctrl++) { > + dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + > + (ctrl * MSI_REG_CTRL_BLOCK_SIZE), > + 4, ~0); > + dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + > + (ctrl * MSI_REG_CTRL_BLOCK_SIZE), > + 4, ~0); > + pp->irq_status[ctrl] = 0; > + } > } > > /* Setup RC BARs */ >
Acked-by: Gustavo Pimentel <[email protected]> Regards, Gustavo
