On Thu, 3 Jan 2019 17:02:09 -0600 Rob Herring <r...@kernel.org> wrote:
> On Thu, 27 Dec 2018 22:50:19 +0100, Martin Blumenstingl wrote: > > Meson8b and Meson8m2 use a 5-bit wide TSC (temperature sensor > > coefficient). The SAR ADC registers however can only store (the lower) > > 4 bits. The fifth (upper-most) bit is stored inside the > > MESON_HHI_DPLL_TOP_0[9] register from the HHI register area. > > This adds a syscon property to the HHI register area so a driver can > > fetch the HHI register map and store the fifth TSC bit in there. > > > > Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> > > --- > > .../devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > Reviewed-by: Rob Herring <r...@kernel.org> Applied to the togreg branch of iio.git and pushed out as testing for the autobuilders to play with it. Thanks, Jonathan
