This patch series applies to family 15 CPU's of AMD platforms, so as to address a consistent warning of "[Firmware Bug]: cpu 0, invalid threshold interrupt offset" at every boot and upon completiong of successful S3 cycle, due to a missing quirk, which was not extended to newer models and also not applied in resume path.
Shirish S (2): x86/mce/amd: Extend "Disable error thresholding bank 4" to more models x86/mce/amd: Ensure quirks are applied in resume path as well arch/x86/kernel/cpu/mce/amd.c | 34 ++++++++++++++++++++++++++++++++++ arch/x86/kernel/cpu/mce/core.c | 2 +- 2 files changed, 35 insertions(+), 1 deletion(-) -- 2.7.4
