Add the attributes for the system memory side caches.
Signed-off-by: Keith Busch <keith.bu...@intel.com>
---
Documentation/ABI/stable/sysfs-devices-node | 34 +++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/Documentation/ABI/stable/sysfs-devices-node
b/Documentation/ABI/stable/sysfs-devices-node
index 74cfc80cabf6..e128464691f0 100644
--- a/Documentation/ABI/stable/sysfs-devices-node
+++ b/Documentation/ABI/stable/sysfs-devices-node
@@ -142,3 +142,37 @@ Contact: Keith Busch <keith.bu...@intel.com>
Description:
This node's write latency in nanosecondss available to memory
initiators in nodes found in this class's initiators_nodelist.
+
+What: /sys/devices/system/node/nodeX/side_cache/indexY/associativity
+Date: December 2018
+Contact: Keith Busch <keith.bu...@intel.com>
+Description:
+ The caches associativity: 0 for direct mapped, non-zero if
+ indexed.
+
+What: /sys/devices/system/node/nodeX/side_cache/indexY/level
+Date: December 2018
+Contact: Keith Busch <keith.bu...@intel.com>
+Description:
+ This cache's level in the memory hierarchy. Matches 'Y' in the
+ directory name.
+
+What: /sys/devices/system/node/nodeX/side_cache/indexY/line_size
+Date: December 2018
+Contact: Keith Busch <keith.bu...@intel.com>
+Description:
+ The number of bytes accessed from the next cache level on a
+ cache miss.
+
+What: /sys/devices/system/node/nodeX/side_cache/indexY/size
+Date: December 2018
+Contact: Keith Busch <keith.bu...@intel.com>
+Description:
+ The size of this memory side cache in bytes.
+
+What: /sys/devices/system/node/nodeX/side_cache/indexY/write_policy
+Date: December 2018
+Contact: Keith Busch <keith.bu...@intel.com>
+Description:
+ The cache write policy: 0 for write-back, 1 for write-through,
+ 2 for other or unknown.
--
2.14.4
