The Marvell Alaska family of PHYs supports 2.5GBaseT and 5GBaseT modes,
as defined in the 802.3bz specification.

When the link partner requests a 2.5GBASET link, the PHY will
reconfigure it's MII interface to 2500BASEX.

At 5G, the PHY will reconfigure it's interface to 5GBASE-R, but this
mode isn't supported by any MAC for now.

This was tested with :
 - The 88X3310, which is on the MacchiatoBin
 - The 88E2010, an Alaska PHY that has no fiber interfaces, and is
   limited to 5G maximum speed.

Signed-off-by: Maxime Chevallier <maxime.chevall...@bootlin.com>
---
 drivers/net/phy/marvell10g.c | 31 +++++++++++++++++++++++--------
 1 file changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
index f2a6d6e7041a..f45ddf3bc138 100644
--- a/drivers/net/phy/marvell10g.c
+++ b/drivers/net/phy/marvell10g.c
@@ -255,6 +255,7 @@ static int mv3310_config_init(struct phy_device *phydev)
 
        /* Check that the PHY interface type is compatible */
        if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
+           phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&
            phydev->interface != PHY_INTERFACE_MODE_XAUI &&
            phydev->interface != PHY_INTERFACE_MODE_RXAUI &&
            phydev->interface != PHY_INTERFACE_MODE_10GKR)
@@ -264,8 +265,10 @@ static int mv3310_config_init(struct phy_device *phydev)
        if (ret)
                return ret;
 
-       linkmode_and(phydev->advertising, phydev->advertising,
-                    phydev->supported);
+       /* Make sure we advertise all the supported modes, and not just the
+        * default one specified in the driver's .features.
+        */
+       linkmode_copy(phydev->advertising, phydev->supported);
 
        return 0;
 }
@@ -314,8 +317,17 @@ static int mv3310_config_aneg(struct phy_device *phydev)
        else
                reg = 0;
 
+       if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+                             phydev->advertising))
+               reg |= MDIO_AN_10GBT_CTRL_ADV2_5G;
+       if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+                             phydev->advertising))
+               reg |= MDIO_AN_10GBT_CTRL_ADV5G;
+
        ret = mv3310_modify(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
-                           MDIO_AN_10GBT_CTRL_ADV10G, reg);
+                           MDIO_AN_10GBT_CTRL_ADV10G |
+                           MDIO_AN_10GBT_CTRL_ADV5G |
+                           MDIO_AN_10GBT_CTRL_ADV2_5G, reg);
        if (ret < 0)
                return ret;
        if (ret > 0)
@@ -344,17 +356,20 @@ static int mv3310_aneg_done(struct phy_device *phydev)
 static void mv3310_update_interface(struct phy_device *phydev)
 {
        if ((phydev->interface == PHY_INTERFACE_MODE_SGMII ||
+            phydev->interface == PHY_INTERFACE_MODE_2500BASEX ||
             phydev->interface == PHY_INTERFACE_MODE_10GKR) && phydev->link) {
                /* The PHY automatically switches its serdes interface (and
-                * active PHYXS instance) between Cisco SGMII and 10GBase-KR
-                * modes according to the speed.  Florian suggests setting
-                * phydev->interface to communicate this to the MAC. Only do
-                * this if we are already in either SGMII or 10GBase-KR mode.
+                * active PHYXS instance) between Cisco SGMII, 10GBase-KR and
+                * 2500BaseX modes according to the speed.  Florian suggests
+                * setting phydev->interface to communicate this to the MAC.
+                * Only do this if we are already in one of the above modes.
                 */
                if (phydev->speed == SPEED_10000)
                        phydev->interface = PHY_INTERFACE_MODE_10GKR;
+               else if (phydev->speed == SPEED_2500)
+                       phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
                else if (phydev->speed >= SPEED_10 &&
-                        phydev->speed < SPEED_10000)
+                        phydev->speed < SPEED_2500)
                        phydev->interface = PHY_INTERFACE_MODE_SGMII;
        }
 }
-- 
2.19.2

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