On Fri, 2018-12-14 at 13:57 -0800, Stephen Boyd wrote: > Why is "fixup" in the subject of this patch? >
I'll fix in next version. > Quoting Weiyi Lu (2018-12-09 23:32:29) > > From: Owen Chen <[email protected]> > > > > PLLs with tuner_en bit, such as APLL1, need to disable > > tuner_en before apply new frequency settings, or the new frequency > > settings (pcw) will not be applied. > > The tuner_en bit will be disabled during changing PLL rate > > and be restored after new settings applied. > > Another minor change is to correct the macro name of pcw change bit > > to CON1_PCW_CHG because PCW_CHG(BIT31) is on CON1. > > > > Cc: <[email protected]> > > Signed-off-by: Owen Chen <[email protected]> > > So there should be some Fixes: tag here too so we know what commit is > being fixed? > I'll add in next version. > > _______________________________________________ > Linux-mediatek mailing list > [email protected] > http://lists.infradead.org/mailman/listinfo/linux-mediatek
