Quoting Evan Green (2019-01-23 14:11:35)
> @@ -1144,6 +1150,8 @@ static const struct qmp_phy_cfg sdm845_ufsphy_cfg = {
>
> .is_dual_lane_phy = true,
> .no_pcs_sw_reset = true,
> +
> + .has_ufsphy_reset = true,
Is this the same as .no_pcs_sw_reset implying that .has_ufsphy_reset? Or
it's possible to have no resets at all? I'd think there's a reset in the
phy or in the pcs and so we could just have one bit telling us which
type of reset to perform.
> };
>
> static const struct qmp_phy_cfg msm8998_usb3phy_cfg = {
> @@ -1314,6 +1322,9 @@ static int qcom_qmp_phy_com_exit(struct qcom_qmp *qmp)
> return 0;
> }
>
> + if (qmp->ufs_reset)
> + reset_control_assert(qmp->ufs_reset);
> +
> if (cfg->has_phy_com_ctrl) {
> qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
> SERDES_START | PCS_START);
> @@ -1351,6 +1362,33 @@ static int qcom_qmp_phy_init(struct phy *phy)
>
> dev_vdbg(qmp->dev, "Initializing QMP phy\n");
>
> + if (cfg->has_ufsphy_reset) {
> + /*
> + * Get UFS reset, which is delayed until now to avoid a
> + * circular dependency where UFS needs its PHY, but the PHY
> + * needs this UFS reset.
> + */
> + if (!qmp->ufs_reset) {
> + qmp->ufs_reset =
> + devm_reset_control_get_exclusive(qmp->dev,
> + "ufsphy");
> +
> + if (IS_ERR(qmp->ufs_reset)) {
> + dev_err(qmp->dev,
> + "failed to get UFS reset: %d\n",
> + PTR_ERR(qmp->ufs_reset));
> +
> + ret = PTR_ERR(qmp->ufs_reset);
Do this ret conversion once and then print it after?
> + qmp->ufs_reset = NULL;
> + return ret;
> + }
> + }
> +
> + ret = reset_control_assert(qmp->ufs_reset);
> + if (ret)
> + goto err_lane_rst;
> + }
> +
> ret = qcom_qmp_phy_com_init(qphy);
> if (ret)
> return ret;
