On Mon, Dec 4, 2017 at 5:07 PM Brijesh Singh <[email protected]> wrote: > > On AMD platforms, under certain conditions insn_len may be zero on #NPF. > This can happen if a guest gets a page-fault on data access but the HW > table walker is not able to read the instruction page (e.g instruction > page is not present in memory). > > Typically, when insn_len is zero, x86_emulate_instruction() walks the > guest page table and fetches the instruction bytes from guest memory. > When SEV is enabled, the guest memory is encrypted with guest-specific > key hence hypervisor will not able to fetch the instruction bytes. > In those cases we simply restart the guest. > > I have encountered this issue when running kernbench inside the guest. > > Cc: Thomas Gleixner <[email protected]> > Cc: Ingo Molnar <[email protected]> > Cc: "H. Peter Anvin" <[email protected]> > Cc: Paolo Bonzini <[email protected]> > Cc: "Radim Krčmář" <[email protected]> > Cc: Joerg Roedel <[email protected]> > Cc: Borislav Petkov <[email protected]> > Cc: Tom Lendacky <[email protected]> > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > Signed-off-by: Brijesh Singh <[email protected]> > --- > arch/x86/kvm/mmu.c | 10 ++++++++++ > arch/x86/kvm/svm.c | 6 ++++-- > 2 files changed, 14 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c > index e5e66e5c6640..d5e5dbd0e5ad 100644 > --- a/arch/x86/kvm/mmu.c > +++ b/arch/x86/kvm/mmu.c > @@ -4950,6 +4950,16 @@ int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t > cr2, u64 error_code, > if (mmio_info_in_cache(vcpu, cr2, direct)) > emulation_type = 0; > emulate: > + /* > + * On AMD platforms, under certain conditions insn_len may be zero on > #NPF. > + * This can happen if a guest gets a page-fault on data access but > the HW > + * table walker is not able to read the instruction page (e.g > instruction > + * page is not present in memory). In those cases we simply restart > the > + * guest. > + */ > + if (unlikely(insn && !insn_len)) > + return 1; > +
How does this work, for instance, with MMIO at CPL3 with SMAP enabled?
