> Subject: Re: [PATCH] PCI: xilinx-nwl: Fix Multi MSI data programming
> 
> On Wed, Feb 13, 2019 at 07:55:39PM +0530, Bharat Kumar Gogada wrote:
> > The current Multi MSI data programming fails if a end point is
> > connected with switch.
> >
> > Fix Multi MSI data, by programming data with required alignment.
> 
> I have no idea what this means. If you are fixing a bug describe it properly
> and provide a Fixes: tag with the commit you are fixing.
> 
Thanks Lorenzo for your time. Will add above details and re send.

Regards,
Bharat
> 
> 
> > Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gog...@xilinx.com>
> > ---
> >  drivers/pci/controller/pcie-xilinx-nwl.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c
> > b/drivers/pci/controller/pcie-xilinx-nwl.c
> > index 81538d7..36669c5 100644
> > --- a/drivers/pci/controller/pcie-xilinx-nwl.c
> > +++ b/drivers/pci/controller/pcie-xilinx-nwl.c
> > @@ -484,7 +484,7 @@ static int nwl_irq_domain_alloc(struct irq_domain
> > *domain, unsigned int virq,
> >
> >     mutex_lock(&msi->lock);
> >     bit = bitmap_find_next_zero_area(msi->bitmap, INT_PCI_MSI_NR, 0,
> > -                                    nr_irqs, 0);
> > +                                    nr_irqs, nr_irqs - 1);
> >     if (bit >= INT_PCI_MSI_NR) {
> >             mutex_unlock(&msi->lock);
> >             return -ENOSPC;
> > --
> > 2.7.4
> >

Reply via email to